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Copyright (C) 1994-2023 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: U-2023.03L-SP1
Install: C:\lscc\diamond\3.13\synpbase
OS: Windows 10 or later
Hostname: DESKTOP-L92NLN5

Implementation : impl1

# Written on Wed Mar  5 03:14:33 2025

##### DESIGN INFO #######################################################

Top View:                "prox_detect"
Constraint File(s):      (none)




##### SUMMARY ############################################################

Found 0 issues in 0 out of 0 constraints


##### DETAILS ############################################################



<a name=clockRelationships48></a>Clock Relationships</a>
*******************

Starting                                      Ending                                        |     rise to rise     |     fall to fall     |     rise to fall     |     fall to rise                     
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
prox_detect|clk                               prox_detect|clk                               |     5.000            |     No paths         |     No paths         |     No paths                         
rpr0521rs_driver|clk_400khz_derived_clock     rpr0521rs_driver|clk_400khz_derived_clock     |     5.000            |     No paths         |     No paths         |     No paths                         
rpr0521rs_driver|clk_400khz_derived_clock     segment_scan|clk_40khz_derived_clock          |     5.000            |     No paths         |     No paths         |     No paths                         
rpr0521rs_driver|clk_400khz_derived_clock     rpr0521rs_driver|dat_valid_derived_clock      |     5.000            |     No paths         |     No paths         |     No paths                         
segment_scan|clk_40khz_derived_clock          segment_scan|clk_40khz_derived_clock          |     5.000            |     No paths         |     No paths         |     No paths                         
rpr0521rs_driver|dat_valid_derived_clock      rpr0521rs_driver|dat_valid_derived_clock      |     5.000            |     No paths         |     No paths         |     No paths                         
=======================================================================================================================================================================================================
 Note: 'No paths' indicates there are no paths in the design for that pair of clock edges.
       'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups.


<a name=UnconstrainedStartEndPointsCCK49></a>Unconstrained Start/End Points</a>
******************************

p:buzzer
p:i2c_scl
p:i2c_sda (bidir end point)
p:i2c_sda (bidir start point)
p:led[0]
p:led[1]
p:led[2]
p:led[3]
p:led[4]
p:led[5]
p:led[6]
p:led[7]
p:led_blue
p:led_green
p:led_red
p:rst_n
p:seg_din
p:seg_rck
p:seg_sck


<a name=InapplicableconstraintsCCK50></a>Inapplicable constraints</a>
************************

(none)


<a name=ApplicableConstraintsWithIssuesCCK51></a>Applicable constraints with issues</a>
**********************************

(none)


<a name=ConstraintsWithMatchingWildcardExpressionsCCK52></a>Constraints with matching wildcard expressions</a>
**********************************************

(none)


<a name=LibraryReportCCK53></a>Library Report</a>
**************


# End of Constraint Checker Report

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